Hands-on with the NetFPGA to build a Gigabit-rate Router


Tutorial Speakers: Jad Naous of the High Performance Network Group at Stanford University and Andrew Moore of  Computer Laboratory at Cambridge University


An open platform called the NetFPGA has been developed recently. The NetFPGA platform enables researchers and instructors to build high-speed, hardware-accelerated networking systems. The platform can be used in the classroom to teach students how to build Ethernet switches and Internet Prototcol (IP) routers using hardware rather than software. The platform can be used by researchers to prototype advanced services for next-generation networks.

By using Field Programmable Gate Arrays (FPGAs), the NetFPGA enables new types of packet routing circuits to be implemented and detailed measurements of network traffic to be obtained. During the tutorial, we will use the NetFPGA to determine the amount of memory needed to buffer TCP/IP data streaming through the Gigabit/second router. Hardware circuits within the NetFPGA will be implemented to measure and plot the occupancy of buffers. Circuits will be downloaded into reconfigurable hardware and tested with live, streaming Internet video traffic.  During the second day attendees will create a simple NetFPGA project and walk through the creation and verification of the project by writing verification and regression tests.

Attendees will be working on PC's with a NetFPGA card installed per PC, in groups of two or three persons per PC; Verilog/FPGA design tools will be provided.


Attendees will utilize a Linux-based PC equipped with NetFPGA hardware. A basic understanding of Ethernet switching and network routing is expected. Knowledge of Verilog is very useful but not mandatory.

Additional Information

Information about previous events as well as a description of the NetFPGA Platform are available on-line from the NetFPGA homepage.


Photograph from NetFPGA tutorial at Crete